Cita APA (7a ed.)
Li, J., Liang, Y., Yang, Z., & Li, X. (2025). An Efficient Convolutional Neural Network Accelerator Design on FPGA Using the Layer-to-Layer Unified Input Winograd Architecture. Electronics. https://doi.org/10.3390/electronics14061182
Cita Chicago Style (17a ed.)
Li, Jie, Yong Liang, Zhenhao Yang, y Xinhai Li. "An Efficient Convolutional Neural Network Accelerator Design on FPGA Using the Layer-to-Layer Unified Input Winograd Architecture." Electronics 2025. https://doi.org/10.3390/electronics14061182.
Cita MLA (9a ed.)
Li, Jie, et al. "An Efficient Convolutional Neural Network Accelerator Design on FPGA Using the Layer-to-Layer Unified Input Winograd Architecture." Electronics, 2025, https://doi.org/10.3390/electronics14061182.
Precaución: Estas citas no son 100% exactas.