Macro-programmable reconfigurable stream processor for collaborative manufacturing systems

Bewaard in:
Bibliografische gegevens
Gepubliceerd in:Journal of Intelligent Manufacturing vol. 19, no. 6 (Dec 2008), p. 723-734
Hoofdauteur: Kirischian, Valeri
Andere auteurs: Geurkov, Vadim, Chun, Pill Woo, Kirischian, Lev
Gepubliceerd in:
Springer Nature B.V.
Onderwerpen:
Online toegang:Citation/Abstract
Full Text
Full Text - PDF
Tags: Voeg label toe
Geen labels, Wees de eerste die dit record labelt!

MARC

LEADER 00000nab a2200000uu 4500
001 200510954
003 UK-CbPIL
022 |a 0956-5515 
022 |a 1572-8145 
024 7 |a 10.1007/s10845-008-0123-3  |2 doi 
035 |a 200510954 
045 2 |b d20081201  |b d20081231 
084 |a 53474  |2 nlm 
100 1 |a Kirischian, Valeri 
245 1 |a Macro-programmable reconfigurable stream processor for collaborative manufacturing systems 
260 |b Springer Nature B.V.  |c Dec 2008 
513 |a Journal Article 
520 3 |a Issue Title: Special Issue on Advanced Technologies for Collaborative Manufacturing; Guest Editors: Lihui Wang and Andrew Y.C. Nee Growing demand for high speed processing of streamed data (e.g. video-streams, digital signal streams, communication streams, etc.) in the advanced manufacturing environments requires the adequate cost-efficient stream-processing platforms. Platforms based on the embedded microprocessors often cannot satisfy performance requirements due to limitations associated with the sequential nature of data execution process. During the last decade, development and prototyping of the above embedded platforms has started moving towards utilization of the Field Programmable Gate Array (FPGA) devices. However, the programming of an application to the FPGA based platform became an issue due to relatively complicated hardware design process. The paper presents an approach which allows simplification of the application programming process by utilization of: (i) the uniformed FPGA platform with the dynamically reconfigurable architecture, (ii) a programming technique based on a temporal partitioning of the application in segments which can be described in terms of macro-operators (function specific virtual components). The paper describes the concept of the approach, presents the analytical investigation and experimental verification of the cost-effectiveness of the proposed platform comparing to the platforms based on sequential micro-processors. It is also shown that the approach can be beneficially utilized in collaborative design and manufacturing. [PUBLICATION ABSTRACT] 
653 |a Cost analysis 
653 |a Data processing 
653 |a Design 
653 |a Software 
653 |a Microprocessors 
653 |a Collaboration 
653 |a Investigations 
653 |a High speed 
653 |a Field programmable gate arrays 
653 |a Manufacturing 
653 |a Economic 
700 1 |a Geurkov, Vadim 
700 1 |a Chun, Pill Woo 
700 1 |a Kirischian, Lev 
773 0 |t Journal of Intelligent Manufacturing  |g vol. 19, no. 6 (Dec 2008), p. 723-734 
786 0 |d ProQuest  |t ABI/INFORM Global 
856 4 1 |3 Citation/Abstract  |u https://www.proquest.com/docview/200510954/abstract/embedded/7BTGNMKEMPT1V9Z2?source=fedsrch 
856 4 0 |3 Full Text  |u https://www.proquest.com/docview/200510954/fulltext/embedded/7BTGNMKEMPT1V9Z2?source=fedsrch 
856 4 0 |3 Full Text - PDF  |u https://www.proquest.com/docview/200510954/fulltextPDF/embedded/7BTGNMKEMPT1V9Z2?source=fedsrch