Inference of Quantized Neural Networks on Heterogeneous All-Programmable Devices
में बचाया:
| में प्रकाशित: | arXiv.org (Jun 21, 2018), p. n/a |
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| मुख्य लेखक: | |
| अन्य लेखक: | , , |
| प्रकाशित: |
Cornell University Library, arXiv.org
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| विषय: | |
| ऑनलाइन पहुंच: | Citation/Abstract Full text outside of ProQuest |
| टैग: |
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| LEADER | 00000nab a2200000uu 4500 | ||
|---|---|---|---|
| 001 | 2073545602 | ||
| 003 | UK-CbPIL | ||
| 022 | |a 2331-8422 | ||
| 024 | 7 | |a 10.23919/DATE.2018.8342121 |2 doi | |
| 035 | |a 2073545602 | ||
| 045 | 0 | |b d20180621 | |
| 100 | 1 | |a Preußer, Thomas B | |
| 245 | 1 | |a Inference of Quantized Neural Networks on Heterogeneous All-Programmable Devices | |
| 260 | |b Cornell University Library, arXiv.org |c Jun 21, 2018 | ||
| 513 | |a Working Paper | ||
| 520 | 3 | |a Neural networks have established as a generic and powerful means to approach challenging problems such as image classification, object detection or decision making. Their successful employment foots on an enormous demand of compute. The quantization of network parameters and the processed data has proven a valuable measure to reduce the challenges of network inference so effectively that the feasible scope of applications is expanded even into the embedded domain. This paper describes the making of a real-time object detection in a live video stream processed on an embedded all-programmable device. The presented case illustrates how the required processing is tamed and parallelized across both the CPU cores and the programmable logic and how the most suitable resources and powerful extensions, such as NEON vectorization, are leveraged for the individual processing steps. The crafted result is an extended Darknet framework implementing a fully integrated, end-to-end solution from video capture over object annotation to video output applying neural network inference at different quantization levels running at 16~frames per second on an embedded Zynq UltraScale+ (XCZU3EG) platform. | |
| 653 | |a Field programmable gate arrays | ||
| 653 | |a Neural networks | ||
| 653 | |a Parallel processing | ||
| 653 | |a Electronic devices | ||
| 653 | |a Image detection | ||
| 653 | |a Frames per second | ||
| 653 | |a Inference | ||
| 653 | |a Image classification | ||
| 653 | |a Video data | ||
| 653 | |a Vector processing (computers) | ||
| 653 | |a Programmable logic devices | ||
| 653 | |a Annotations | ||
| 653 | |a Neon | ||
| 653 | |a Object recognition | ||
| 653 | |a Measurement | ||
| 653 | |a Decision making | ||
| 653 | |a Central processing units--CPUs | ||
| 700 | 1 | |a Gambardella, Giulio | |
| 700 | 1 | |a Fraser, Nicholas | |
| 700 | 1 | |a Blott, Michaela | |
| 773 | 0 | |t arXiv.org |g (Jun 21, 2018), p. n/a | |
| 786 | 0 | |d ProQuest |t Engineering Database | |
| 856 | 4 | 1 | |3 Citation/Abstract |u https://www.proquest.com/docview/2073545602/abstract/embedded/7BTGNMKEMPT1V9Z2?source=fedsrch |
| 856 | 4 | 0 | |3 Full text outside of ProQuest |u http://arxiv.org/abs/1806.08085 |