Metamodeling-Driven IP Reuse for SoC Integration and Microprocessor Design

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Kaituhi matua:	Mathaikutty, Deepak A
Ētahi atu kaituhi:	Shukla, Sandeep
I whakaputaina:	Artech House
Ngā marau:	Software Computers Integrated circuits Systems design TJFD Systems development Circuits Systems analysis Engineering Electronics Software engineering Technology Computer software > Reusability. ; Computer software > Verification. ; Intellectual property. ; Microprocessors > Design and construction. ; System design. ; Systems on a chip > Design and construction. Microelectronics
Urunga tuihono:	Full Text - Ebook
Ngā Tūtohu:	Tāpirihia he Tūtohu Kāore He Tūtohu, Me noho koe te mea tuatahi ki te tūtohu i tēnei pūkete!

Whakaahuatanga
Whakarāpopotonga:	This cutting-edge resource offers you an in-depth understanding of metamodeling approaches for the reuse of intellectual properties (IPs) in the form of reusable design or verification components. The books covers the essential issues associated with fast and effective integration of reusable design components into a system-on-a-chip (SoC) to achieve faster design turn-around time. Moreover, it addresses key factors related to the use of reusable verification IPs for a "write once, use many times" verification strategy - another effective approach that can attain a faster product design cycle.
ISBN:	9781596934252
Puna:	Ebook Central