The Innovative Effects Of Hdl And Fpga On Digital Hardware Design Education In Eet Programs
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| Publicado en: | Association for Engineering Education - Engineering Library Division Papers (Jun 24, 2007), p. 12.1440.1 |
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American Society for Engineering Education-ASEE
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| Acceso en línea: | Citation/Abstract Full text outside of ProQuest |
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| Resumen: | With the development of computer-aided design and semiconductor technologies, Hardware Description Language (HDL) and Field Programmable Gate Arrays (FPGA) have become dominant design and implementation tools for digital hardware and are widely used by both industry and academia. As a result, they will bring many innovative effects on the architectures, contents, and methodologies of digital hardware design courses in Electrical Engineering Technology (EET) programs. In this paper, by comparing in detail the design procedures of three typical digital circuits when the traditional design methodology and the VHDL and FPGA methodology are employed respectively, we will clearly demonstrate those innovative effects of VHDL and FPGA on digital hardware design courses, such as why some traditional skills are outdated and what the newly emerged skills are. From the design procedures of those typical digital circuits, we can conclude that the best way to teach HDL and FPGA in EET programs is to integrate HDL and FPGA into all digital hardware design courses, from entry level to advanced level, rather than open an independent course. I. Introduction Digital hardware design has been considered as core education contents for Electrical Engineering Technology (EET) programs for more than two decades. As a result, a whole set of methodologies, such as truth table, canonical sum-of-products expressions, and Karnaugh maps for combinational circuit, and finite state machine, state diagram, state table, and state assignment for sequential circuit, have been well-developed to analyze and design digital circuits1. However, because the complexity to design a digital circuit increases exponentially with the number of gates used in the circuit, only small-scale digital circuits can be explored in digital hardware design courses when those traditional methodologies are employed. In order to analyze and design large-scale digital circuits, Hardware Description Languages (HDLs), including Verilog and VHDL (Very High Speed Integrated Circuits HDL), have been developed to describe the model and behavior of digital hardware 2. Although HDLs are similar to a computer programming language in format, HDL codes are not programs to be executed on a computer. HDLs were originally developed for two purposes: first, as a documentation language to describe the structure and behavior of complex digital circuits designed by multiple designers; second, as an input to computer simulation software to simulate the operation of circuits 3. Since VHDL was first established as the IEEE 1076 standard in 1987, and then revised as the IEEE 1164 standard in 1993, many Computer-Aided Design (CAD) systems adopt VHDL to provide documentation and simulation functions. Furthermore, with the development of CAD technologies, more and more CAD system also use VHDL as design entry to provide synthesis functions, i.e. converting VHDL codes into a hardware implementation of the described circuit 4. Now VHDL has become a dominant hardware developing tool to design, simulate and document large-scale digital circuits and is widely used by both industry and academia. |
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| Fuente: | Library Science Database |