High Performance Architecture in the MU6 Network
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| Publicat a: | PQDT - Global (1984) |
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ProQuest Dissertations & Theses
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| Accés en línia: | Citation/Abstract Full Text - PDF |
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| Resum: | This thesis is concerned with the study of a class of high performance computer architectures in the MU6 Network, It discusses and analyses the architecture of a class of vector processing systems. It is hoped that this architecture would provide a technique for employing a large number of dedicated vector processing units on a single problem to attain high performance. Part of this research involved the comparative study of currently implemented vector and parallel architectures for which there appear to be no standardized techniques for comparative performance evaluation. In the absence of any such techniques a new tool is proposed. This attempts to introduce some degree of standardization into benchmarks construction for this class of machine architectures. The characteristics of a class of vector architectures are defined. By using this definition, specific systems are then generated and evaluated within the architectural frame. The generated systems range from Microprocessor derivatives to high performance versions for solving large scale scientific application problems. Each generated system consists of several identical and independent vector processing units. The external functional behaviour does not depend on the number of vector processing units and it works properly with any number of units. The microprocessor derivatives are programmable whilst hardware structures may be provided for the high performance versions to ensure high performance throughout, After the computer generation process the actual simulation of the complete class takes place, An experimental simulation facility for the systematic evaluation of this class of architectures is also presented, Simulation studies have shown these architectures to be viable and the performance estimates have shown the MU6V architectures to have the greatest potential for high performance compared with the currently implemented vector architectures. The simulation technique is shown to be viable and a number of issues of performance evaluation for design optimization can be examined by this technique. |
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| ISBN: | 9798662415089 |
| Font: | ProQuest Dissertations & Theses Global |