Design and performance evaluation of the bidirectional ring -based shared memory multiprocessor
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| Publicado en: | ProQuest Dissertations and Theses (1999) |
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| Acceso en línea: | Citation/Abstract Full Text - PDF |
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| Resumen: | Distributed shared memory (DSM) multiprocessors share a globally addressable memory space over a set of physically distributed memory modules. In such a system, the processors and the memory communicate with each other by sending and receiving messages over the interconnection network. Thus, the design of the interconnection network critically impacts the performance of the multiprocessor system. Most ring based multiprocessor systems proposed and built have been based on unidirectional rings. The bidirectional rings have several advantages over the unidirectional rings such as less latency of communication yielding better performance for a small overhead in terms of implementation. This dissertation investigates the various aspects of the bidirectional ring as an interconnection network structure for DSM multiprocessors. An analytical model for the bidirectional ring network is derived and its performance is studied through theoretical analysis as well as simulation. The workload parameters were extracted from the trace files of several parallel benchmark application programs. The performance of the bidirectional ring is compared with that of the unidirectional ring as well as the powerful crossbar switch network. The effect of varying the workload parameters such as miss rate, communication locality and the system parameters such as message length and relative processor speed are studied in detail. Quantitative results are presented to show that bidirectional rings yield better performance in general and especially better when the system configuration is not optimal, such as the relative speeds of the processors and the varying lengths of the messages. A new cache coherence protocol is proposed for the bidirectional ring multiprocessors. The proposed protocol reduces the message traversal length and the traffic by exploiting the multicast capability of the ring networks. The performance of the protocol is evaluated through execution driven simulations and compared with other cache coherence protocols described in the literature. The proposed protocol yields a performance improvement of up to 13% over the other protocols when bidirectional rings are assumed. Finally, a different approach is studied for improving the performance of DSM multiprocessors: rather than trying to reduce the latency through the interconnection network, the performance can be improved by reducing the number of remote accesses. Since the circuit density is increasing due to the rapidly advancing semiconductor device technology, on-chip multiprocessors with multi-level caches have been considered as viable systems. Different configurations are studied using execution driven simulations and tested on standard benchmark applications. Thus, the performance of the DSM multiprocessors can be further improved by effective utilization of the cache area in on-chip multiprocessors. |
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| ISBN: | 9780599736139 |
| Fuente: | ProQuest Dissertations & Theses Global |