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Design of Reconfigurable Logic Block Based Sequential Circuits Using Look Up Table Logics

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izdano v:Turkish Journal of Computer and Mathematics Education vol. 15, no. 1 (2024), p. 195
Glavni avtor: Muneesa, Haleem
Drugi avtorji: Deepika, Jakkala Yoga, Prasanna, Obulam Yogendra Lakshmi, Sumasree, Gummadi, Thaslim, Shaik
Izdano:
Ninety Nine Publication
Teme:
Digital systems
Data processing
Circuits
Lookup tables
Shift registers
Communication networks
Reconfiguration
Configurations
Logic
Global positioning systems > GPS
Embedded systems
Communication
Signal processing
Mathematics education
Design
Critical path
Data compression
Field programmable gate arrays
Influence of Technology
Computers
Communication (Thought Transfer)
Arithmetic
Computer Graphics
Algorithms
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Resumen:Reconfigurable sequential circuits find applications in various digital systems, including communication networks, data processing units, embedded systems, and FPGA-based designs. Their ability to adapt and reconfigure their functionality on-the-fly allows them to accommodate dynamic requirements and optimize the use of hardware resources. Traditional implementations of sequential circuits involve static configurations, where the logic and functionality are fixed during synthesis. While these methods are straightforward to design and implement, they lack adaptability and cannot be modified without redesigning the entire circuit. The proposed method involves the utilization of a dedicated Reconfigurable Logic Block (RLB) within the sequential circuits, allowing for dynamic configuration changes without altering the overall circuit structure. The RLB can be programmed to provide different logic functions using look up tables, multiplexers, enabling the sequential circuit such as counters and shift registers to change its behaviour.
ISSN:1309-4653
Fuente:Science Database