Implementation of Systolic Multiplier Using Hybrid Multiplexer Dependent Adder
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| Gepubliceerd in: | Turkish Journal of Computer and Mathematics Education vol. 15, no. 1 (2024), p. 218 |
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| Andere auteurs: | , , , |
| Gepubliceerd in: |
Ninety Nine Publication
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| Online toegang: | Citation/Abstract Full Text - PDF |
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| 001 | 3070032958 | ||
| 003 | UK-CbPIL | ||
| 022 | |a 1309-4653 | ||
| 035 | |a 3070032958 | ||
| 045 | 2 | |b d20240101 |b d20241231 | |
| 100 | 1 | |a Bhargavi, P |u Department of Electronics and Communication Engineering, Geethanjali Institute of Science and Technology, Nellore | |
| 245 | 1 | |a Implementation of Systolic Multiplier Using Hybrid Multiplexer Dependent Adder | |
| 260 | |b Ninety Nine Publication |c 2024 | ||
| 513 | |a Journal Article | ||
| 520 | 3 | |a Multipliers are basic building blocks in various integrated circuits like microprocessors, micro controllers, and ALUs. The existing multipliers suffer from high power consumption and inefficient use of hardware resources. They often rely on traditional adder structures that are not tailored for specific operations, leading to suboptimal performance. Additionally, their fixed architectures limit adaptability and scalability in different applications. So, the proposed approach offers enhanced computational efficiency and reduced power consumption compared to conventional multiplier designs. By integrating multiplexer-dependent adders into the systolic array, the proposed method optimizes resource utilization and delivers improved performance for various arithmetic operations. This integration allows for dynamic selection of adder types based on the specific multiplication operation, significantly reducing power consumption and latency. By adapting the hardware resources to computational needs, the method achieves higher efficiency and flexibility, making it suitable for a wide range of applications in digital signal processing and data processing systems. | |
| 653 | |a Multiplexing | ||
| 653 | |a Power management | ||
| 653 | |a Multiplication | ||
| 653 | |a Multiplexers | ||
| 653 | |a Data processing | ||
| 653 | |a Resource utilization | ||
| 653 | |a Integrated circuits | ||
| 653 | |a Digital signal processing | ||
| 653 | |a Multipliers | ||
| 653 | |a Hardware | ||
| 653 | |a Power consumption | ||
| 653 | |a Microprocessors | ||
| 653 | |a Adding circuits | ||
| 653 | |a Cryptography | ||
| 653 | |a Random access memory | ||
| 653 | |a Signal processing | ||
| 653 | |a Mathematics education | ||
| 653 | |a Circuits | ||
| 653 | |a Energy consumption | ||
| 653 | |a Efficiency | ||
| 653 | |a Circulatory system | ||
| 653 | |a Embedded systems | ||
| 653 | |a Multiplication & division | ||
| 653 | |a Design | ||
| 653 | |a Arrays | ||
| 653 | |a Algorithms | ||
| 653 | |a Critical path | ||
| 653 | |a Merchandise Information | ||
| 653 | |a Influence of Technology | ||
| 653 | |a Addition | ||
| 653 | |a Computation | ||
| 653 | |a Computers | ||
| 653 | |a Memory | ||
| 653 | |a Anatomy | ||
| 653 | |a Arithmetic | ||
| 700 | 1 | |a Mounika, Nandanavanam |u Department of Electronics and Communication Engineering, Geethanjali Institute of Science and Technology, Nellore | |
| 700 | 1 | |a Sarika, Magam |u Department of Electronics and Communication Engineering, Geethanjali Institute of Science and Technology, Nellore | |
| 700 | 1 | |a Sindhuja, Leburu |u Department of Electronics and Communication Engineering, Geethanjali Institute of Science and Technology, Nellore | |
| 700 | 1 | |a Sravani, Kommu |u Department of Electronics and Communication Engineering, Geethanjali Institute of Science and Technology, Nellore | |
| 773 | 0 | |t Turkish Journal of Computer and Mathematics Education |g vol. 15, no. 1 (2024), p. 218 | |
| 786 | 0 | |d ProQuest |t Science Database | |
| 856 | 4 | 1 | |3 Citation/Abstract |u https://www.proquest.com/docview/3070032958/abstract/embedded/6A8EOT78XXH2IG52?source=fedsrch |
| 856 | 4 | 0 | |3 Full Text - PDF |u https://www.proquest.com/docview/3070032958/fulltextPDF/embedded/6A8EOT78XXH2IG52?source=fedsrch |