Parallel Implementation of K-Best Quadrature Amplitude Modulation Detection for Massive Multiple Input Multiple Output Systems

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Մատենագիտական մանրամասներ
Հրատարակված է:Electronics vol. 13, no. 14 (2024), p. 2775
Հիմնական հեղինակ: Gokalgandhi, Bhargav
Այլ հեղինակներ: Ling, Jonathan, Latinović, Zoran, Samardzija, Dragan, Seskar, Ivan
Հրապարակվել է:
MDPI AG
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Առցանց հասանելիություն:Citation/Abstract
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024 7 |a 10.3390/electronics13142775  |2 doi 
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100 1 |a Gokalgandhi, Bhargav  |u Nokia Bell Labs, 600 Mountain Ave Bldg 5, New Providence, NJ 07974, USA; <email>jonathan.ling@nokia-bell-labs.com</email> (J.L.); <email>zoran.latinovic@nokia.com</email> (Z.L.) 
245 1 |a Parallel Implementation of K-Best Quadrature Amplitude Modulation Detection for Massive Multiple Input Multiple Output Systems 
260 |b MDPI AG  |c 2024 
513 |a Journal Article 
520 3 |a Massive MIMO (Multiple Input Multiple Output) systems impose significant processing burdens along with strict latency requirements. The combination of large-scale antenna arrays and wide bandwidth requirements for next-generation wireless systems creates an exponential increase in frontend to backend data. Balancing the processing latency and reliability is critical for baseband processing tasks such as QAM detection. While linear detection algorithms have low computational complexity, their use in Massive MIMO scenario has heavy degradation in error performance. Nonlinear detection methods such as Maximum Likelihood and Sphere Decoding have good error performance, but they suffer from high, variable, and uncontrollable computational complexity. For such cases, the K-best QAM detection algorithm can provide required control over the system performance while maintaining near-ML error performance. In this paper, hard-output, as well as soft-output K-best QAM detection, is implemented in a CPU by utilizing the multiple cores combined with vector processing. Similarly, hard-output detection in a GPU is implemented by leveraging the SIMD (Single Instruction, Multiple Data) architecture and Warp-based execution model. The processing time per bit and the energy consumption per bit are compared for CPU and GPU implementations for QAM constellation density and MIMO array size. The GPU implementation shows up to 5× processing latency per bit improvement and up to 120× energy consumption per bit improvement over the CPU implementation for typical QAM constellations such as 4, 16, and 64 QAM. GPU implementation also shows up to 125× improvement over CPU implementation in energy consumption per bit for larger MIMO configurations such as 24 × 24 and 32 × 32. Finally, the soft-output detector is combined with a LDPC (Low-Density Parity Check) decoder to obtain the FER (Frame Error Rate) performance for CPU implementation. The FER is then combined with frame processing latency to form a Goodput metric to demonstrate the latency and reliability tradeoff. 
610 4 |a NVidia Corp 
653 |a Antenna arrays 
653 |a Software 
653 |a Central processing units--CPUs 
653 |a System reliability 
653 |a Decoding 
653 |a Maximum likelihood decoding 
653 |a Signal processing 
653 |a Task complexity 
653 |a Performance evaluation 
653 |a Density 
653 |a Energy consumption 
653 |a Error detection 
653 |a Field programmable gate arrays 
653 |a MIMO communication 
653 |a Graphics processing units 
653 |a Quadrature amplitude modulation 
653 |a Antennas 
653 |a Network latency 
653 |a Algorithms 
653 |a Vector processing (computers) 
653 |a Performance degradation 
653 |a Arrays 
653 |a Error correcting codes 
700 1 |a Ling, Jonathan  |u Nokia Bell Labs, 600 Mountain Ave Bldg 5, New Providence, NJ 07974, USA; <email>jonathan.ling@nokia-bell-labs.com</email> (J.L.); <email>zoran.latinovic@nokia.com</email> (Z.L.) 
700 1 |a Latinović, Zoran  |u Nokia Bell Labs, 600 Mountain Ave Bldg 5, New Providence, NJ 07974, USA; <email>jonathan.ling@nokia-bell-labs.com</email> (J.L.); <email>zoran.latinovic@nokia.com</email> (Z.L.) 
700 1 |a Samardzija, Dragan  |u Nokia Bell Labs, 600 Mountain Ave Bldg 5, New Providence, NJ 07974, USA; <email>jonathan.ling@nokia-bell-labs.com</email> (J.L.); <email>zoran.latinovic@nokia.com</email> (Z.L.) 
700 1 |a Seskar, Ivan  |u WINLAB, Rutgers University, 671 US-1, North Brunswick, NJ 08902, USA; <email>seskar@winlab.rutgers.edu</email> 
773 0 |t Electronics  |g vol. 13, no. 14 (2024), p. 2775 
786 0 |d ProQuest  |t Advanced Technologies & Aerospace Database 
856 4 1 |3 Citation/Abstract  |u https://www.proquest.com/docview/3084744009/abstract/embedded/L8HZQI7Z43R0LA5T?source=fedsrch 
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856 4 0 |3 Full Text - PDF  |u https://www.proquest.com/docview/3084744009/fulltextPDF/embedded/L8HZQI7Z43R0LA5T?source=fedsrch