HPVM-HDC: A Heterogeneous Programming System for Accelerating Hyperdimensional Computing
Wedi'i Gadw mewn:
| Cyhoeddwyd yn: | arXiv.org (Dec 2, 2024), p. n/a |
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| Prif Awdur: | |
| Awduron Eraill: | , , , , , , , , |
| Cyhoeddwyd: |
Cornell University Library, arXiv.org
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| Pynciau: | |
| Mynediad Ar-lein: | Citation/Abstract Full text outside of ProQuest |
| Tagiau: |
Dim Tagiau, Byddwch y cyntaf i dagio'r cofnod hwn!
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MARC
| LEADER | 00000nab a2200000uu 4500 | ||
|---|---|---|---|
| 001 | 3119286628 | ||
| 003 | UK-CbPIL | ||
| 022 | |a 2331-8422 | ||
| 035 | |a 3119286628 | ||
| 045 | 0 | |b d20241202 | |
| 100 | 1 | |a Arbore, Russel | |
| 245 | 1 | |a HPVM-HDC: A Heterogeneous Programming System for Accelerating Hyperdimensional Computing | |
| 260 | |b Cornell University Library, arXiv.org |c Dec 2, 2024 | ||
| 513 | |a Working Paper | ||
| 520 | 3 | |a Hyperdimensional Computing (HDC), a technique inspired by cognitive models of computation, has been proposed as an efficient and robust alternative basis for machine learning. HDC programs are often manually written in low-level and target specific languages targeting CPUs, GPUs, and FPGAs - these codes cannot be easily retargeted onto HDC-specific accelerators. No previous programming system enables productive development of HDC programs and generates efficient code for several hardware targets. We propose a heterogeneous programming system for HDC: a novel programming language, HDC++, for writing applications using a unified programming model, including HDC-specific primitives to improve programmability, and a heterogeneous compiler, HPVM-HDC, that provides an intermediate representation for compiling HDC programs to many hardware targets. We implement two tuning optimizations, automatic binarization and reduction perforation, that exploit the error resilient nature of HDC. Our evaluation shows that HPVM-HDC generates performance-competitive code for CPUs and GPUs, achieving a geomean speed-up of 1.17x over optimized baseline CUDA implementations with a geomean reduction in total lines of code of 1.6x across CPUs and GPUs. Additionally, HPVM-HDC targets an HDC Digital ASIC and an HDC ReRAM accelerator simulator, enabling the first execution of HDC applications on these devices. | |
| 653 | |a Algorithms | ||
| 653 | |a Computation | ||
| 653 | |a Machine learning | ||
| 653 | |a Hardware | ||
| 653 | |a Graphics processing units | ||
| 653 | |a Application specific integrated circuits | ||
| 653 | |a Programming languages | ||
| 700 | 1 | |a Routh, Xavier | |
| 700 | 1 | |a Noor, Abdul Rafae | |
| 700 | 1 | |a Kothari, Akash | |
| 700 | 1 | |a Yang, Haichao | |
| 700 | 1 | |a Xu, Weihong | |
| 700 | 1 | |a Pinge, Sumukh | |
| 700 | 1 | |a Adve, Vikram | |
| 700 | 1 | |a Rosing, Tajana | |
| 700 | 1 | |a Zhou, Minxuan | |
| 773 | 0 | |t arXiv.org |g (Dec 2, 2024), p. n/a | |
| 786 | 0 | |d ProQuest |t Engineering Database | |
| 856 | 4 | 1 | |3 Citation/Abstract |u https://www.proquest.com/docview/3119286628/abstract/embedded/6A8EOT78XXH2IG52?source=fedsrch |
| 856 | 4 | 0 | |3 Full text outside of ProQuest |u http://arxiv.org/abs/2410.15179 |