Masala-CHAI: A Large-Scale SPICE Netlist Dataset for Analog Circuits by Harnessing AI

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Detalles Bibliográficos
Publicado en:	arXiv.org (Nov 25, 2024), p. n/a
Autor principal:	Bhandari, Jitendra
Otros Autores:	Bhat, Vineet, He, Yuheng, Garg, Siddharth, Rahmani, Hamed, Karri, Ramesh
Publicado:	Cornell University Library, arXiv.org
Materias:	Circuit design Verification Large language models Integrated circuits Automation Analog circuits Circuit diagrams Workflow
Acceso en línea:	Citation/Abstract Full text outside of ProQuest
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Descripción
Resumen:	Masala-CHAI is the first fully automated framework leveraging large language models (LLMs) to generate Simulation Programs with Integrated Circuit Emphasis (SPICE) netlists. It addresses a long-standing challenge in automating netlist generation for analog circuits within circuit design automation. Automating this workflow could accelerate the creation of finetuned LLMs for analog circuit design and verification. We identify key challenges in this automation and evaluate the multi-modal capabilities of state-of-the-art LLMs, particularly GPT-4, to address these issues. We propose a three-step workflow to overcome current limitations: labeling analog circuits, prompt tuning, and netlist verification. This approach aims to create an end-to-end SPICE netlist generator from circuit schematic images, tackling the long-standing hurdle of accurate netlist generation. Our framework demonstrates significant performance improvements, tested on approximately 2,100 schematics of varying complexity. We open-source this solution for community-driven development.
ISSN:	2331-8422
Fuente:	Engineering Database