Efficient VLSI Architectures for Brain Computer Interfaces

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Pubblicato in:ProQuest Dissertations and Theses (2025)
Autore principale: Keller, Nicholas Andreas
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ProQuest Dissertations & Theses
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100 1 |a Keller, Nicholas Andreas 
245 1 |a Efficient VLSI Architectures for Brain Computer Interfaces 
260 |b ProQuest Dissertations & Theses  |c 2025 
513 |a Dissertation/Thesis 
520 3 |a This thesis presents three efficient VLSI architectures for Brain-Computer Interfaces (BCIs). The first design implements a parametric fixed-point digital filter that generates four BCI signals commonly used in feature extraction. The second design implements a two-state classifier based on a Hidden Markov Model to predict intent versus non-intent. The third design compresses low-frequency BCI data utilizing a time-differential model, achieving a compression ratio of 4. For each design, both fixed-point and floating-point MATLAB scripts were developed to validate and refine the design’s fundamentals and accuracy. All designs were described using fixed-point Verilog/VHDL and verified with the corresponding MATLAB models. Finally, the Verilog/VHDL models were synthesized onto a Virtex-7 FPGA using Xilinx Vivado synthesis tools, and onto an ASIC using Synopsys Fusion Compiler. The FPGA and ASIC designs were compared in terms of power dissipation, resource utilization, and input-output latency. 
653 |a Electrical engineering 
653 |a Computer engineering 
653 |a Mechanical engineering 
773 0 |t ProQuest Dissertations and Theses  |g (2025) 
786 0 |d ProQuest  |t ProQuest Dissertations & Theses Global 
856 4 1 |3 Citation/Abstract  |u https://www.proquest.com/docview/3169905561/abstract/embedded/L8HZQI7Z43R0LA5T?source=fedsrch 
856 4 0 |3 Full Text - PDF  |u https://www.proquest.com/docview/3169905561/fulltextPDF/embedded/L8HZQI7Z43R0LA5T?source=fedsrch