Structural design of memory system for Ternary Optical Computer
保存先:
| 出版年: | PLoS One vol. 20, no. 2 (Feb 2025), p. e0309839 |
|---|---|
| 第一著者: | |
| その他の著者: | , , , , , |
| 出版事項: |
Public Library of Science
|
| 主題: | |
| オンライン･アクセス: | Citation/Abstract Full Text Full Text - PDF |
| タグ: |
タグなし, このレコードへの初めてのタグを付けませんか!
|
| 抄録: | Ternary Optical Computer (TOC) is unique in the development of optical computers, in terms of principle, experiment, algorithm and application. After 20 years of development, six generations of prototypes have been developed. At present, tri-state optical signal storage is the main problem faced by TOC. According to the characteristics of tri-state optical signals and the ternary optical processor’s special requirements for storage systems, we design and implement the interface structure of TOC memory system, including the overall structure of the interface, the address generation module for memory access, the data input and output channels, the read/write timing, and the working process of the memory interface. Finally, the correctness of the memory system interface design is verified by the experiments, which are carried out on FPGA, of reading and writing operational result data of the SD16 TOC prototype. This work tries to improve the theoretical system and practical basis of TOC. |
|---|---|
| ISSN: | 1932-6203 |
| DOI: | 10.1371/journal.pone.0309839 |
| ソース: | Health & Medical Collection |