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Performance Estimation of Low Power and Area-Efficient Parallel Pipelined FFT

Guardat en:
Publicat a:Measurement Science Review vol. 25, no. 3 (2025), p. 134
Autor principal: Surya, P
Altres autors: Arunachalaperumal, C, Dhilipkumar, S
Publicat:
De Gruyter Brill Sp. z o.o., Paradigm Publishing Services
Matèries:
Wireless communications
Image manipulation
Embedded systems
Computer architecture
Digital signal processing
Video
Fourier transforms
Lookup tables
Multipliers
Microprocessors
Fast Fourier transformations
Time signals
High speed
Power management
Processors
Field programmable gate arrays
Digital signal processors
Resource utilization
Critical components
Real time
Image processing
Power consumption
Signal processing
Algorithms
Image processing systems
Accés en línia:Citation/Abstract
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