Performance Evaluation of FPGA, GPU, and CPU in FIR Filter Implementation for Semiconductor-Based Systems

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Detalles Bibliográficos
Publicado en:	Journal of Low Power Electronics and Applications vol. 15, no. 3 (2025), p. 40-56
Autor principal:	Arucu Muhammet
Otros Autores:	Iliev Teodor
Publicado:	MDPI AG
Materias:	Wireless communications Software Central processing units > CPUs Performance evaluation Semiconductors Gallium arsenide Edge computing Architecture Electronics industry Field programmable gate arrays Manufacturing Transistors Energy consumption Technology Processing speed Global positioning systems > GPS Integrated circuits Consumers Artificial intelligence Digital signal processing Graphics processing units Sensors Zinc oxides FIR filters Medical equipment Design Energy efficiency Resource utilization
Acceso en línea:	Citation/Abstract Full Text + Graphics Full Text - PDF
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