FPGA-Accelerated Multi-Resolution Spline Reconstruction for Real-Time Multimedia Signal Processing

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Vydáno v:	Electronics vol. 15, no. 1 (2025), p. 173-190
Hlavní autor:	Reis Manuel J. C. S.
Vydáno:	MDPI AG
Témata:	Parallel processing Central processing units > CPUs Computer architecture Mathematical models Video signals Signal processing Edge computing Approximation Architecture Field programmable gate arrays Fixed point arithmetic Signal reconstruction Arithmetic and logic units Embedded systems Image reconstruction Graphics processing units Multimedia Pipelining (computers) Network latency Design Energy efficiency Algorithms Real time
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