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RVAM16: a low-cost multiple-ISA processor based on RISC-V and ARM Thumb

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Udgivet i:Frontiers of Computer Science vol. 19, no. 1 (Jan 2025), p. 191103
Hovedforfatter: Huang, Libo
Andre forfattere: Zhang, Jing, Yang, Ling, Ma, Sheng, Wang, Yongwen, Cheng, Yuanhu
Udgivet:
Springer Nature B.V.
Fag:
Embedded systems
RISC
Energy consumption
Hardware
Microprocessors
Energy efficiency
Compatible software
Codes
Optimization
Online adgang:Citation/Abstract
Full Text - PDF
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024 7 |a 10.1007/s11704-023-3239-x  |2 doi 
035 |a 3126807458 
045 2 |b d20250101  |b d20250131 
100 1 |a Huang, Libo  |u National University of Defense Technology, College of Computer Science and Technology, Changsha, China (GRID:grid.412110.7) (ISNI:0000 0000 9548 2110) 
245 1 |a RVAM16: a low-cost multiple-ISA processor based on RISC-V and ARM Thumb 
260 |b Springer Nature B.V.  |c Jan 2025 
513 |a Journal Article 
520 3 |a The rapid development of ISAs has brought the issue of software compatibility to the forefront in the embedded field. To address this challenge, one of the promising solutions is the adoption of a multiple-ISA processor that supports multiple different ISAs. However, due to constraints in cost and performance, the architecture of a multiple-ISA processor must be carefully optimized to meet the specific requirements of embedded systems. By exploring the RISC-V and ARM Thumb ISAs, this paper proposes RVAM16, which is an optimized multiple-ISA processor microarchitecture for embedded devices based on hardware binary translation technique. The results show that, when running non-native ARM Thumb programs, RVAM16 achieves a significant speedup of over 2.73× with less area and energy consumption compared to using hardware binary translation alone, reaching more than 70% of the performance of native RISC-V programs. 
653 |a Embedded systems 
653 |a RISC 
653 |a Energy consumption 
653 |a Hardware 
653 |a Microprocessors 
653 |a Energy efficiency 
653 |a Compatible software 
653 |a Codes 
653 |a Optimization 
700 1 |a Zhang, Jing  |u National University of Defense Technology, College of Computer Science and Technology, Changsha, China (GRID:grid.412110.7) (ISNI:0000 0000 9548 2110) 
700 1 |a Yang, Ling  |u National University of Defense Technology, College of Computer Science and Technology, Changsha, China (GRID:grid.412110.7) (ISNI:0000 0000 9548 2110) 
700 1 |a Ma, Sheng  |u National University of Defense Technology, College of Computer Science and Technology, Changsha, China (GRID:grid.412110.7) (ISNI:0000 0000 9548 2110) 
700 1 |a Wang, Yongwen  |u National University of Defense Technology, College of Computer Science and Technology, Changsha, China (GRID:grid.412110.7) (ISNI:0000 0000 9548 2110) 
700 1 |a Cheng, Yuanhu  |u National University of Defense Technology, College of Computer Science and Technology, Changsha, China (GRID:grid.412110.7) (ISNI:0000 0000 9548 2110) 
773 0 |t Frontiers of Computer Science  |g vol. 19, no. 1 (Jan 2025), p. 191103 
786 0 |d ProQuest  |t Advanced Technologies & Aerospace Database 
856 4 1 |3 Citation/Abstract  |u https://www.proquest.com/docview/3126807458/abstract/embedded/7BTGNMKEMPT1V9Z2?source=fedsrch 
856 4 0 |3 Full Text - PDF  |u https://www.proquest.com/docview/3126807458/fulltextPDF/embedded/7BTGNMKEMPT1V9Z2?source=fedsrch