Efficient VLSI Architectures for Brain Computer Interfaces
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| Vydáno v: | ProQuest Dissertations and Theses (2025) |
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ProQuest Dissertations & Theses
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| On-line přístup: | Citation/Abstract Full Text - PDF |
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| Abstrakt: | This thesis presents three efficient VLSI architectures for Brain-Computer Interfaces (BCIs). The first design implements a parametric fixed-point digital filter that generates four BCI signals commonly used in feature extraction. The second design implements a two-state classifier based on a Hidden Markov Model to predict intent versus non-intent. The third design compresses low-frequency BCI data utilizing a time-differential model, achieving a compression ratio of 4. For each design, both fixed-point and floating-point MATLAB scripts were developed to validate and refine the design’s fundamentals and accuracy. All designs were described using fixed-point Verilog/VHDL and verified with the corresponding MATLAB models. Finally, the Verilog/VHDL models were synthesized onto a Virtex-7 FPGA using Xilinx Vivado synthesis tools, and onto an ASIC using Synopsys Fusion Compiler. The FPGA and ASIC designs were compared in terms of power dissipation, resource utilization, and input-output latency. |
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| ISBN: | 9798304970006 |
| Zdroj: | ProQuest Dissertations & Theses Global |