FPGA-based Low Latency Square Root CORDIC Algorithm

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Xehetasun bibliografikoak
Argitaratua izan da:	Journal of Telecommunications and Information Technology no. 1 (2025), p. 21
Egile nagusia:	Węgrzyn, Mariusz
Beste egile batzuk:	Voytusik, Stepan, Gavkalova, Nataliia
Argitaratua:	Instytut Lacznosci - Panstwowy Instytut Badawczy (National Institute of Telecommunications)
Gaiak:	Xilinx Inc Central processing units > CPUs Control algorithms Neural networks Digital signal processing Graphics processing units Lookup tables Computer vision Digital computers Signal processing Edge computing Digital filters Mathematical functions Approximation Numerical analysis Algorithms Methods Field programmable gate arrays Machine learning Floating point arithmetic Telecommunications
Sarrera elektronikoa:	Citation/Abstract Full Text Full Text - PDF
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