A DMA Engine for On-Board Real-Time Imaging Processing of Spaceborne SAR Based on a Dedicated Instruction Set

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Detalles Bibliográficos
Publicado en:	Electronics vol. 14, no. 16 (2025), p. 3209-3242
Autor principal:	Zhang, Ao
Otros Autores:	Zhu, Yang, Li, Yongrui, Xu, Ming, Xie Yizhuang
Publicado:	MDPI AG
Materias:	National Aeronautics & Space Administration > NASA China Data transfer (computers) Very large scale integration Remote sensing Bandwidths Performance tests Synthetic aperture radar Onboard Efficiency Imaging Data processing Large scale integration Design Algorithms Real time Satellites Engines
Acceso en línea:	Citation/Abstract Full Text + Graphics Full Text - PDF
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Descripción
Resumen:	With advancements in remote sensing technology and very-large-scale integration (VLSI) circuit technology, the Earth observation capabilities of spaceborne synthetic aperture radar (SAR) have continuously improved, leading to significantly increased performance demands for on-board SAR real-time imaging processors. Currently, the low data access efficiency of traditional direct memory access (DMA) engines remains a critical technical bottleneck limiting the real-time processing performance of SAR imaging systems. To address this limitation, this paper proposes a dedicated instruction set for spaceborne SAR data transfer control, leveraging the memory access characteristics of DDR4 SDRAM and common data read/write address jump patterns during on-board SAR real-time imaging processing. This instruction set can significantly reduce the number of instructions required in DMA engine data access operations and optimize data access logic patterns. While effectively reducing memory resource usage, it also substantially enhances the data access efficiency of DMA engines. Based on the proposed dedicated instruction set, we designed a DMA engine optimized for efficient data access in on-board SAR real-time imaging processing scenarios. Module-level performance tests were conducted on this engine, and full-process imaging experiments were performed using an FPGA-based SAR imaging system. Experimental results demonstrate that, under spaceborne SAR imaging processing conditions, the proposed DMA engine achieves a receive data bandwidth of 2.385 GB/s and a transmit data bandwidth of 2.649 GB/s at a 200 MHz clock frequency, indicating excellent memory access bandwidth and efficiency. Furthermore, tests show that the complete SAR imaging system incorporating this DMA engine processes a 16 k × 16 k SAR image using the Chirp Scaling (CS) algorithm in 1.2325 s, representing a significant improvement in timeliness compared to existing solutions.
ISSN:	2079-9292
DOI:	10.3390/electronics14163209
Fuente:	Advanced Technologies & Aerospace Database