A DMA Engine for On-Board Real-Time Imaging Processing of Spaceborne SAR Based on a Dedicated Instruction Set

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Publicado en:Electronics vol. 14, no. 16 (2025), p. 3209-3242
Autor principal: Zhang, Ao
Otros Autores: Zhu, Yang, Li, Yongrui, Xu, Ming, Xie Yizhuang
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MDPI AG
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035 |a 3244012879 
045 2 |b d20250101  |b d20251231 
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100 1 |a Zhang, Ao 
245 1 |a A DMA Engine for On-Board Real-Time Imaging Processing of Spaceborne SAR Based on a Dedicated Instruction Set 
260 |b MDPI AG  |c 2025 
513 |a Journal Article 
520 3 |a With advancements in remote sensing technology and very-large-scale integration (VLSI) circuit technology, the Earth observation capabilities of spaceborne synthetic aperture radar (SAR) have continuously improved, leading to significantly increased performance demands for on-board SAR real-time imaging processors. Currently, the low data access efficiency of traditional direct memory access (DMA) engines remains a critical technical bottleneck limiting the real-time processing performance of SAR imaging systems. To address this limitation, this paper proposes a dedicated instruction set for spaceborne SAR data transfer control, leveraging the memory access characteristics of DDR4 SDRAM and common data read/write address jump patterns during on-board SAR real-time imaging processing. This instruction set can significantly reduce the number of instructions required in DMA engine data access operations and optimize data access logic patterns. While effectively reducing memory resource usage, it also substantially enhances the data access efficiency of DMA engines. Based on the proposed dedicated instruction set, we designed a DMA engine optimized for efficient data access in on-board SAR real-time imaging processing scenarios. Module-level performance tests were conducted on this engine, and full-process imaging experiments were performed using an FPGA-based SAR imaging system. Experimental results demonstrate that, under spaceborne SAR imaging processing conditions, the proposed DMA engine achieves a receive data bandwidth of 2.385 GB/s and a transmit data bandwidth of 2.649 GB/s at a 200 MHz clock frequency, indicating excellent memory access bandwidth and efficiency. Furthermore, tests show that the complete SAR imaging system incorporating this DMA engine processes a 16 k × 16 k SAR image using the Chirp Scaling (CS) algorithm in 1.2325 s, representing a significant improvement in timeliness compared to existing solutions. 
610 4 |a National Aeronautics & Space Administration--NASA 
651 4 |a China 
653 |a Data transfer (computers) 
653 |a Very large scale integration 
653 |a Remote sensing 
653 |a Bandwidths 
653 |a Performance tests 
653 |a Synthetic aperture radar 
653 |a Onboard 
653 |a Efficiency 
653 |a Imaging 
653 |a Data processing 
653 |a Large scale integration 
653 |a Design 
653 |a Algorithms 
653 |a Real time 
653 |a Satellites 
653 |a Engines 
700 1 |a Zhu, Yang 
700 1 |a Li, Yongrui 
700 1 |a Xu, Ming 
700 1 |a Xie Yizhuang 
773 0 |t Electronics  |g vol. 14, no. 16 (2025), p. 3209-3242 
786 0 |d ProQuest  |t Advanced Technologies & Aerospace Database 
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856 4 0 |3 Full Text - PDF  |u https://www.proquest.com/docview/3244012879/fulltextPDF/embedded/7BTGNMKEMPT1V9Z2?source=fedsrch