Implementation of Systolic Multiplier Using Hybrid Multiplexer Dependent Adder

Uloženo v:

Podrobná bibliografie
Vydáno v:	Turkish Journal of Computer and Mathematics Education vol. 15, no. 1 (2024), p. 218
Hlavní autor:	Bhargavi, P
Další autoři:	Mounika, Nandanavanam, Sarika, Magam, Sindhuja, Leburu, Sravani, Kommu
Vydáno:	Ninety Nine Publication
Témata:	Multiplexing Power management Multiplication Multiplexers Data processing Resource utilization Integrated circuits Digital signal processing Multipliers Hardware Power consumption Microprocessors Adding circuits Cryptography Random access memory Signal processing Mathematics education Circuits Energy consumption Efficiency Circulatory system Embedded systems Multiplication & division Design Arrays Algorithms Critical path Merchandise Information Influence of Technology Addition Computation Computers Memory Anatomy Arithmetic
On-line přístup:	Citation/Abstract Full Text - PDF
Tagy:	Přidat tag Žádné tagy, Buďte první, kdo vytvoří štítek k tomuto záznamu!

Popis
Abstrakt:	Multipliers are basic building blocks in various integrated circuits like microprocessors, micro controllers, and ALUs. The existing multipliers suffer from high power consumption and inefficient use of hardware resources. They often rely on traditional adder structures that are not tailored for specific operations, leading to suboptimal performance. Additionally, their fixed architectures limit adaptability and scalability in different applications. So, the proposed approach offers enhanced computational efficiency and reduced power consumption compared to conventional multiplier designs. By integrating multiplexer-dependent adders into the systolic array, the proposed method optimizes resource utilization and delivers improved performance for various arithmetic operations. This integration allows for dynamic selection of adder types based on the specific multiplication operation, significantly reducing power consumption and latency. By adapting the hardware resources to computational needs, the method achieves higher efficiency and flexibility, making it suitable for a wide range of applications in digital signal processing and data processing systems.
ISSN:	1309-4653
Zdroj:	Science Database