CPU formal verification receives a boost

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Pubblicato in:	Electronic Engineering Times no. 927 (Nov 11, 1996), p. 56-58
Autore principale:	Rathje, Thomas
Altri autori:	Sandler, Scott
Pubblicazione:	AspenCore
Soggetti:	Chrysalis Symbolic Design Inc Rise Technology Inc United States > US Integrated circuits Software packages Case studies Startups Electronics industry Automation Computer based modeling Product design Operating systems Simulation Software Logic Transistors Product testing Custom design Designers
Accesso online:	Citation/Abstract Full Text + Graphics Full Text - PDF
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Descrizione
Abstract:	Today, commercial formal-verification tools are allowing CPU designers to overcome functional verification hurdles caused by the skyrocketing size and complexity of deep-submicron silicon. One recent adopter of formal verification is Rise Technology, a Silicon Valley startup designing a multimillion-transistor microprocessor system. Without formal verification, CPUs would be prohibitively costly to develop, especially for startup companies. Rise Technology has pioneered a CPU design methodology that combines formal verification with emulation to validate the register-transfer-level model of a new design. Diagnostics, operating systems and applications run on the target system with the new CPU in the emulator, and formal verification ensures that the emulated gates are functionally identical to the RTL. The Chrysalis Design Verifyer formal-equivalence-checking software ensures that the emulated design has exactly the same logic as the RTL.
ISSN:	0192-1541
Fonte:	Telecommunications Database