Embedded Streaming Hardware Accelerators Interconnect Architectures and Latency Evaluation

Kaydedildi:

Detaylı Bibliyografya
Yayımlandı:	Electronics vol. 14, no. 8 (2025), p. 1513
Yazar:	Cristian-Tiberius, Axinte
Diğer Yazarlar:	Stan, Andrei, Vasile-Ion, Manta
Baskı/Yayın Bilgisi:	MDPI AG
Konular:	Software Central processing units > CPUs Random access memory Computer architecture Hardware Communication Microprocessors Signal processing Neural networks Network latency Design Architecture Embedded systems Transmitters Block diagrams First in-first out protocols Field programmable gate arrays Resource utilization System on chip Energy consumption Accelerators Interfaces
Online Erişim:	Citation/Abstract Full Text + Graphics Full Text - PDF
Etiketler:	Etiketle Etiket eklenmemiş, İlk siz ekleyin!