Multiple boundary scan-paths for minimizing circuit-board test-application time

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I whakaputaina i:	Microprocessing and Microprogramming vol. 40, no. 6 (Jul 1994), p. 377-386
Kaituhi matua:	Antonakopoulos, Theodoros
Ētahi atu kaituhi:	Kanopoulos, Nick
I whakaputaina:	Elsevier Sequoia S.A.
Ngā marau:	Test equipment Studies Printed circuit boards Mathematical models Computer programming
Urunga tuihono:	Citation/Abstract
Ngā Tūtohu:	Tāpirihia he Tūtohu Kāore He Tūtohu, Me noho koe te mea tuatahi ki te tūtohu i tēnei pūkete!