Implementation of Systolic Multiplier Using Hybrid Multiplexer Dependent Adder

Guardat en:

Dades bibliogràfiques
Publicat a:	Turkish Journal of Computer and Mathematics Education vol. 15, no. 1 (2024), p. 218
Autor principal:	Bhargavi, P
Altres autors:	Mounika, Nandanavanam, Sarika, Magam, Sindhuja, Leburu, Sravani, Kommu
Publicat:	Ninety Nine Publication
Matèries:	Multiplexing Power management Multiplication Multiplexers Data processing Resource utilization Integrated circuits Digital signal processing Multipliers Hardware Power consumption Microprocessors Adding circuits Cryptography Random access memory Signal processing Mathematics education Circuits Energy consumption Efficiency Circulatory system Embedded systems Multiplication & division Design Arrays Algorithms Critical path Merchandise Information Influence of Technology Addition Computation Computers Memory Anatomy Arithmetic
Accés en línia:	Citation/Abstract Full Text - PDF
Etiquetes:	Afegir etiqueta Sense etiquetes, Sigues el primer a etiquetar aquest registre!

Sigues el primer a deixar un comentari!