Implementation of Systolic Multiplier Using Hybrid Multiplexer Dependent Adder

Wedi'i Gadw mewn:

Manylion Llyfryddiaeth
Cyhoeddwyd yn:	Turkish Journal of Computer and Mathematics Education vol. 15, no. 1 (2024), p. 218
Prif Awdur:	Bhargavi, P
Awduron Eraill:	Mounika, Nandanavanam, Sarika, Magam, Sindhuja, Leburu, Sravani, Kommu
Cyhoeddwyd:	Ninety Nine Publication
Pynciau:	Multiplexing Power management Multiplication Multiplexers Data processing Resource utilization Integrated circuits Digital signal processing Multipliers Hardware Power consumption Microprocessors Adding circuits Cryptography Random access memory Signal processing Mathematics education Circuits Energy consumption Efficiency Circulatory system Embedded systems Multiplication & division Design Arrays Algorithms Critical path Merchandise Information Influence of Technology Addition Computation Computers Memory Anatomy Arithmetic
Mynediad Ar-lein:	Citation/Abstract Full Text - PDF
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