Heuristics to minimize makespan of parallel batch processing machines

Bibliográfalaš dieđut

Publikašuvnnas:	The International Journal of Advanced Manufacturing Technology vol. 37, no. 9-10 (Jun 2008), p. 1005
Váldodahkki:	Damodaran, Purushothaman
Eará dahkkit:	Ping-Yu, Chang
Almmustuhtton:	Springer Nature B.V.
Fáttát:	Printed circuits Production scheduling Batch processing Simulated annealing Heuristic Circuit boards
Liŋkkat:	Citation/Abstract Full Text - PDF
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