ASIC Verification Technology Brings Bugs To Their Knees

Guardado en:

Bibliografiske detaljer
Udgivet i:	Electronic Design (Jan 18, 2007), p. 30.
Hovedforfatter:	Maliniak, David
Udgivet:	Endeavor Business Media
Fag:	Synplicity Inc United States > US Design engineering Simulation Exports Prototypes Design
Online adgang:	Citation/Abstract Full Text Full Text - PDF
Tags:	Tilføj Tag Ingen Tags, Vær først til at tagge denne postø!

Beskrivelse
Resumen:	To employ Total Recall technology, users would specify a block or full chip for debugging. All memory, logic, and associated circuitry is surrounded by control logic and stimulus. That stimulus is delayed by a specified number of clocks, and all assertions in the HDL are synthesized into the control logic. The design is then loaded into an FPGAbased prototyping board and run as though in emulation.
ISSN:	0013-4872 1944-9550
Fuente:	Science Database