Ata uhi

A Novel Reconfigurable Vector-Processed Interleaving Algorithm for a DVB-RCS2 Turbo Encoder

I tiakina i:
I whakaputaina i:Electronics vol. 14, no. 13 (2025), p. 2600-2617
Kaituhi matua: Bensimon Moshe
Ētahi atu kaituhi: Boxerman Ohad, Ben-Shimol Yehuda, Manor Erez, Greenberg, Shlomo
I whakaputaina:
MDPI AG
Ngā marau:
Wireless communications
Channel capacity
Satellite communications
Hardware
Error correction
Turbo codes
Architecture
Data transmission
Codes
Coders
Efficiency
Data integrity
Embedded systems
Error correction & detection
Digital video
Communications systems
Algorithms
Vector processing (computers)
Data storage
Modular structures
Permutations
Real time
Array processors
Urunga tuihono:Citation/Abstract
Full Text + Graphics
Full Text - PDF
Ngā Tūtohu: Tāpirihia he Tūtohu
Kāore He Tūtohu, Me noho koe te mea tuatahi ki te tūtohu i tēnei pūkete!
Me noho koe te mea tuatahi ki te waiho tākupu!
Me takiuru i te tuatahi