Verification methods for complex-functional blocks in CAD for chips deep submicron design standards

Detalles Bibliográficos

Publicado en:	E3S Web of Conferences vol. 376 (2023), p. n/a
Autor Principal:	Zolnikov, Vladimir
Outros autores:	Zolnikov, Konstantin, Ilina, Nadezhda, Grabovy, Kirill
Publicado:	EDP Sciences
Materias:	Russia Very large scale integration Design standards Verification Circuit design Integrated circuits Software Semiconductors Environmental
Acceso en liña:	Citation/Abstract Full Text - PDF
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