Verification methods for complex-functional blocks in CAD for chips deep submicron design standards

Detaylı Bibliyografya

Yayımlandı:	E3S Web of Conferences vol. 376 (2023), p. n/a
Yazar:	Zolnikov, Vladimir
Diğer Yazarlar:	Zolnikov, Konstantin, Ilina, Nadezhda, Grabovy, Kirill
Baskı/Yayın Bilgisi:	EDP Sciences
Konular:	Russia Very large scale integration Design standards Verification Circuit design Integrated circuits Software Semiconductors Environmental
Online Erişim:	Citation/Abstract Full Text - PDF
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