Verification methods for complex-functional blocks in CAD for chips deep submicron design standards

Bibliográfalaš dieđut

Publikašuvnnas:	E3S Web of Conferences vol. 376 (2023), p. n/a
Váldodahkki:	Zolnikov, Vladimir
Eará dahkkit:	Zolnikov, Konstantin, Ilina, Nadezhda, Grabovy, Kirill
Almmustuhtton:	EDP Sciences
Fáttát:	Russia Very large scale integration Design standards Verification Circuit design Integrated circuits Software Semiconductors Environmental
Liŋkkat:	Citation/Abstract Full Text - PDF
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