Verification methods for complex-functional blocks in CAD for chips deep submicron design standards

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I whakaputaina i:	E3S Web of Conferences vol. 376 (2023), p. n/a
Kaituhi matua:	Zolnikov, Vladimir
Ētahi atu kaituhi:	Zolnikov, Konstantin, Ilina, Nadezhda, Grabovy, Kirill
I whakaputaina:	EDP Sciences
Ngā marau:	Russia Very large scale integration Design standards Verification Circuit design Integrated circuits Software Semiconductors Environmental
Urunga tuihono:	Citation/Abstract Full Text - PDF
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